+libext+.v+.sv
+incdir+/home/ICer/gitee_path/verilog_fifo_code/src/ut_ver/../rtl
-y /home/ICer/gitee_path/verilog_fifo_code/src/ut_ver/../rtl

../ver/sync_hand_fifo_ram_pkg.sv
/home/ICer/gitee_path/verilog_fifo_code/src/ut_ver/../rtl/sync_hand_fifo_ram.v
../top/testbench.sv